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 DS2782 Stand-Alone Fuel Gauge IC
www.maxim-ic.com
GENERAL DESCRIPTION
The DS2782 measures voltage, temperature and current, and estimates available capacity for rechargeable lithium ion and lithium-ion polymer batteries. Cell characteristics and application parameters used in the calculations are stored in onchip EEPROM. The available capacity registers report a conservative estimate of the amount of charge that can be removed given the current temperature, discharge rate, stored charge and application parameters. Capacity estimation reported in mAh remaining and percentage of full.
FEATURES

Precision Voltage, Temperature, and Current Measurement System Accurate Stable Internal Time Base Absolute and Relative Capacity Estimated from Coulomb Count, Discharge Rate, Temperature and Battery Cell Characteristics Accurate Warning of Low Battery Conditions Automatic Backup of Coulomb Count and Age Estimation to Nonvolatile (NV) EEPROM Gain and Tempco Calibration Allows the Use of Low-Cost Sense Resistors 24-Byte User EEPROM or 16-Byte User EEPROM and Unique 64-bit ID Industry 2-Wire Interface with Programmable Slave Address Tiny 8-Pin TSSOP Package Embeds Easily in Battery Packs Using Thin Prismatic Cells

APPLICATIONS
Digital Still Cameras Sub-Notebook Computers Handheld PC Data Terminals 3G Multimedia Wireless Handsets

TYPICAL OPERATING CIRCUIT
Pack+
PIN CONFIGURATION
TOP VIEW
TSSOP-8
150
DS2782
SDA 5 SCL 6 4 VDD 3 1
VIN NC
500
1K
SDA
SCL
150 5.6V 5.6V
PIO
8
1 Cell Li-Ion Battery
NC VSS VIN VDD
1 2 3 4
8 7 6 5
PIO SNS SCL SDA
SNS 7
TSSOP-8
2 VSS
0.1uF Protection Circuit
Pack-
RSNS
ORDERING INFORMATION
PART DS2782E+ DS2782E+T&R MARKING 2782+ 2782+ PACKAGE INFORMATION Lead-Free TSSOP DS2782E+, Tape-and-Reel
Note: To order devices with the unique 64-bit ID option, contact Maxim/Dallas Semiconductor sales.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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REV: 042505
DS2782: Stand-Alone Fuel Gauge IC
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to VSS Voltage on VIN Relative to VSS Operating Temperature Range Storage Temperature Range Soldering Temperature -0.3V to +6.0V -0.3V to VDD+0.3 -40C to +85C -55C to +125C See IPC/JEDEC J-STD-020A Specification
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device.
RECOMMENDED DC OPERATING CHARACTERISTICS
(VDD = 2.5V to 5.5V; TA = -20C to +70C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Supply Voltage SDA, SCL, PIO Voltage Range SYMBOL VDD CONDITIONS (Note 1) (Note 1) MIN +2.5 -0.3 TYP MAX +5.5 +5.5 UNITS V V
DC ELECTRICAL CHARACTERISTICS
(VDD = 2.5V to 5.5V; TA = -20C to +70C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER ACTIVE Current SLEEP Mode Current Input Logic High: SDA, SCL, PIO Input Logic Low: SDA, SCL, PIO Output Logic Low: SDA, PIO Pulldown Current: SDA, SCL, PIO VIN Input Resistance
Bus Low to Sleep time
SYMBOL IACTIVE ISLEEP VIH VIL VOL IPD RIN tSLEEP VSLEEP
CONDITIONS 2.5V VDD 4.2V 2.5V VDD 4.2V (Note 1) (Note 1) IOL = 4mA (Note 1) VSDA, VSCL, VPIO = 0.4V
MIN
TYP 65 1
MAX 95 105 3
UNITS A A V
1.5 0.6 0.4 0.2 15
V V A MW
SDA, SCL < VIL (Note 2) (Note 1) 2.40 2.45
2.2 2.50
s V
Undervoltage SLEEP Threshold
ELECTRICAL CHARACTERISTICS: TEMPERATURE, VOLTAGE, CURRENT
(VCC = 2.5V to 5.5V; TA = -20C to +70C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Temperature Resolution Temperature Error Voltage Resolution Voltage Full-Scale Voltage Error Current Resolution Current Full-Scale SYMBOL TLSB TERR VLSB VFS VERR ILSB IFS 2 of 25 1.56 51.2 0 4.88 4.992 50 CONDITIONS MIN TYP 0.125 3 MAX UNITS C C mV V mV V mV
DS2782: Stand-Alone Fuel Gauge IC PARAMETER Current Gain Error Current Offset Error Accumulated Current Offset SYMBOL IGERR IOERR qOERR CONDITIONS (Note 3) 0C TA +70C, 2.5V VDD 4.2V (Note 5) 0C TA +70C, 2.5V VDD 4.2V VSNS = VSS, (Notes 4, 5) VDD = 3.8V, TA = +25C 0C TA +70C, 2.5V VDD 4.2V - 7.82 - 188 MIN TYP MAX 1 + 12.5 +0 1 2 3 % UNITS % FullScale V Vhr/ day
Timebase Error
tERR
ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE
(2.5V VDD 5.5V, TA = -20C to +70C.)
PARAMETER SCL Clock Frequency Bus Free Time Between a STOP and START Condition Hold Time (Repeated) START Condition Low Period of SCL Clock High Period of SCL Clock Setup Time for a Repeated START Condition Data Hold Time Data Setup Time Rise Time of Both SDA and SCL Signals Fall Time of Both SDA and SCL Signals Setup Time for STOP Condition Spike Pulse Widths Suppressed by Input Filter Capacitive Load for Each Bus Line SCL, SDA Input Capacitance SYMBOL fSCL tBUF tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tR tF tSU:STO tSP CB CBIN (Note 10) (Note 11) (Note 8, 9) (Note 8) (Note 7) CONDITIONS (Note 6) MIN 0 1.3 0.6 1.3 0.6 0.6 0 100
20 + 0.1CB 20 + 0.1CB
TYP
MAX 400
UNITS KHz s s s s s
0.9
s ns
300 300
ns ns s
0.6 0 50 400 60
ns pF pF
EEPROM RELIABILITY SPECIFICATION
(VCC = 2.5V to 5.5V; TA = -20C to +70C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER EEPROM Copy Time EEPROM Copy Endurance SYMBOL tEEC NEEC TA = +50C 50,000 CONDITIONS MIN TYP MAX 10 UNITS ms cycles
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DS2782: Stand-Alone Fuel Gauge IC Note 1: All voltages are referenced to VSS. Note 2: To properly enter sleep mode the application should hold the bus low for longer than the maximum tSLEEP. Note 3: Factory calibrated accuracy. Higher accuracy can be achieved by in-system calibration by the user. Note 4: Accumulation bias register set to 00h. Note 5: Parameters guaranteed by design. Note 6: Timing must be fast enough to prevent the DS2782 from entering sleep mode due to bus low for period > tSLEEP. Note 7: fSCL must meet the minimum clock low time plus the rise/fall times. Note 8: The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW ) of the SCL signal. Note 9: This device internally provides a hold time of at least 300 ns for the SDA signal (referred to the VIHmin of the SCL signal) to bridge the undefined region of the falling edge of SCL. Note 10: Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant. Note 11: Cb - total capacitance of one bus line in pF.
Figure 1. I2C Bus Timing Diagram
SDA
tF tLOW tR
tSU;DAT
tF
tHD;STA
tSP
tR
tBUF
SCL
tHD;STA S
tHD;DAT
tSU;STA Sr
tSU;STO P S
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DS2782: Stand-Alone Fuel Gauge IC
PIN DESCRIPTION
PIN NAME FUNCTION
1 2 3 4
NC VSS VIN VDD
Not Connected. Pin not connected internally, float or connect to VSS. Device Ground. Connect directly to the negative terminal of the battery cell. Connect the sense resistor between VSS and SNS. Voltage Sense Input. The voltage of the battery cell is monitored through this input pin. Power-Supply Input. Connect to the positive terminal of the battery cell through a decoupling network. Serial Data Input/Out. 2-Wire data line. Open-drain output driver. Connect this pin to the DATA terminal of the battery pack. Pin has an internal pull-down (IPD) for sensing disconnection. Serial Clock Input. 2-Wire clock line. Input only. Connect this pin to the CLOCK terminal of the battery pack. Pin has an internal pull-down (IPD) for sensing disconnection. Sense Resistor Connection. Connect to the negative terminal of the battery pack. Connect the sense resistor between VSS and SNS. Programmable I/O Pin. Can be configured as input or output to monitor or control userdefined external circuitry. Output driver is open drain. This pin has an weak internal pulldown (IPD).
5
SDA
6 7 8
SCL SNS PIO
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DS2782: Stand-Alone Fuel Gauge IC
Figure 2. Block Diagram
VDD EN VPOR
BIAS/VREF
Timebase
PIO VIN SDA SCL
2-Wire Interface
Status & Control
Temp & Voltage ADC
EEPROM
Accumulated Current Current ADC 15 bit + sign
Rate, Temperature Compensation
VSS
SNS
DETAILED DESCRIPTION
The DS2782 operates directly from 2.5V to 5.5V and supports single cell Lithium-ion battery packs. As shown in Figure 3, the DS2782 accommodates multicell applications by adding a voltage regulator for VDD and voltage divider for VIN. Nonvolatile storage is provided for cell compensation and application parameters. Host side development of fuel-gauging algorithms is eliminated. On-chip algorithms and convenient status reporting of operating conditions reduce the serial polling required of the host processor. Additionally, 16 bytes of EEPROM memory are made available for the exclusive use of the host system and/or pack manufacturer. The additional EEPROM memory can be used to facilitate battery lot and date tracking and NV storage of system or battery usage statistics. Through its 2-Wire interface, the DS2782 gives the host system read/write access to status and control registers, instrumentation registers, and general-purpose data storage. The 7-bit slave address is field programmable, thus allowing up to 128 devices to be distinctly addressed by the host system. A unique, factory programmed 64-bit registration number (8-bit family code + 48-bit serial number + 8-bit CRC) option assures that no two parts are alike and enables absolute traceability.
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DS2782: Stand-Alone Fuel Gauge IC
Figure 3. Multicell Application Example
Pack+
MAX1615
0.1uF
4.7uF 500
SDA
150 SDA SCL 150 PIO (1) (1) SNS RSNS NC VSS 0.1uF VDD
SCL
DS2782
Multi-Cell Li-Ion (n * R) Battery
VIN R Protection Circuit
Pack-
(1) Components improve IEC1004 Air/Contact ESD compliance
POWER MODES
The DS2782 has two power modes: ACTIVE and SLEEP. On initial power up, the DS2782 defaults to ACTIVE mode. While in ACTIVE mode, the DS2782 is fully functional with measurements and capacity estimation continuously updated. In SLEEP mode, the DS2782 conserves power by disabling measurement and capacity estimation functions, but preserves register contents. SLEEP mode is entered under two different conditions and an enable bit for each condition makes entry into SLEEP optional. SLEEP mode can be enabled using the Power Mode (PMOD) bit or the Under Voltage Enable (UVEN) bit. The PMOD type SLEEP is entered if the PMOD bit is set AND a bus low condition occurs. A bus low condition, where both SDA AND SCL low for tSLEEP (2s nominal), is used to detect a pack disconnection or system shutdown in which the bus pull-up voltage, VPULLUP, is not present. PMOD SLEEP assumes that no charge or discharge current will flow and therefore coulomb counting is not necessary. A system with PMOD SLEEP enabled must ensure that a standalone or cradle charger includes a pull-up on SDA and/or SCL. The DS2782 transitions from PMOD SLEEP to ACTIVE mode when either SDA or SCL is pulled high. The second option for entering SLEEP is an under voltage condition measured on VIN. When the UVEN bit is set, the DS2782 will transition to SLEEP if the voltage on VIN is less than VSLEEP (2.45V nominal) AND the 2-Wire bus is in a bus high or a bus low condition for tSLEEP. UVEN SLEEP relieves the battery of the DS2782 load until communication resumes to prevent over discharging the battery. The DS2782 transitions from UVEN SLEEP to ACTIVE mode when either SDA or SCL change logic state. The bus master should initiate a transaction after charging of a depleted battery begins. Note: PMOD and UVEN SLEEP features must be disabled when a battery is charged on an external charger that does not connect to SDA and/or SCL. PMOD SLEEP can be used if the charger pulls the bus high. The DS2782 remains in SLEEP and therefore does not measure or accumulate current when a battery is charged on a charger that fails to properly drive the communication bus.
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DS2782: Stand-Alone Fuel Gauge IC
INITIATING COMMUNICATION IN SLEEP
When beginning communication with a DS2782 in PMOD SLEEP, the bus must be pulled up before a START bit can be issued by the master. In UVEN SLEEP, the procedure depends on the bus state when UVEN SLEEP was entered. If the bus was low, it must be pulled up before a START bit can be issued by the master as required with PMOD SLEEP. If the bus was high when UVEN SLEEP was entered, then the DS2782 is prepared to receive a START bit from the master. A standard procedure of issuing a START - STOP - START when the host system is powered up on the charger input properly initiates communication from both PMOD and UVEN SLEEP modes.
VOLTAGE MEASUREMENT
Battery voltage is measured at the VIN input with respect to VSS over a range of 0V to 4.992V, with a resolution of 4.88mV. The result is updated every 440ms and placed in the VOLTAGE register in two's compliment form. Voltages above the maximum register value are reported at the maximum value; voltages below the minimum register value are reported at the minimum value. The format of the voltage register is shown in Figure 4.
Figure 4. Voltage Register Format
VOLT MSB--Address 0Ch S MSb
"S": sign bit(s), "X": reserved
Read Only LSB--Address 0Dh
5
2
9
2
8
2
7
2
6
2
2
4
2
3
2
2
2
1
2
0
X
X
X
X
X LSb
LSb
MSb
Units: 4.88mV
VIN is usually connected to the positive terminal of a single cell Lithium-Ion battery via a 1kW resistor. The input impedance is sufficiently large (15MW) to be connected to a high impedance voltage divider in order to support multiple cell applications. The pack voltage should be divided by the number of series cells to present a single cell average voltage to the VIN input. In Figure 3, the value of R can be up to 1MW without incurring significant error due to input loading.
TEMPERATURE MEASUREMENT
The DS2782 uses an integrated temperature sensor to measure battery temperature with a resolution of 0.125C. Temperature measurements are updated every 440ms and placed in the temperature register in two's complement form. The format of the temperature register is shown in Figure 5.
Figure 5. Temperature Register Format
TEMP MSB--Address 0Ah S MSb
"S": sign bit(s), "X": reserved
Read Only LSB--Address 0Bh
5
2
9
2
8
2
7
2
6
2
2
4
2
3
2
2
2
1
2
0
X
X
X
X
X LSb
LSb
MSb
Units: 0.125C
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DS2782: Stand-Alone Fuel Gauge IC
CURRENT MEASUREMENT
In the ACTIVE mode of operation, the DS2782 continually measures the current flow into and out of the battery by measuring the voltage drop across a low-value current-sense resistor, RSNS. The voltage-sense range between SNS and VSS is 51.2mV. The input linearly converts peak signal amplitudes up to 102.4mV as long as the continuous signal level (average over the conversion cycle period) does not exceed 51.2mV. The ADC samples the input differentially at 18.6kHz and updates the Current register at the completion of each conversion cycle. The Current register is updated every 3.515s with the current conversion result in two's complement form. Charge currents above the maximum register value are reported at the maximum value (7FFFh = +51.2mV). Discharge currents below the minimum register value are reported at the minimum value (8000h = -51.2mV).
Figure 6. Current Register Format
CURRENT MSB--Address 0Eh S MSb
"S": sign bit(s)
Read Only LSB--Address 0Fh 2
9
2
14
2
13
2
12
2
11
2
10
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
LSb
MSb
Units:
LSb
1.5625mV/Rsns
CURRENT RESOLUTION (1 LSB) VSS VSNS 1.5625mV RSNS 20mW 78.13mA 15mW 104.2mA 10mW 156.3mA 5mW 312.5mA
AVERAGE CURRENT MEASUREMENT
The Average Current register reports an average current level over the preceding 28 seconds. The register value is updated every 28s in two's complement form, and is the average of the 8 preceding Current register updates. The format of the Average Current register is shown in Figure 7. Charge currents above the maximum register value are reported at the maximum value (7FFFh = +51.2mV). Discharge currents below the minimum register value are reported at the minimum value (8000h = -51.2mV).
Figure 7. Average Current Register Format
IAVG MSB--Address 08h S MSb
"S": sign bit(s)
R/W LSB--Address 09h
10
2
14
2
13
2
12
2
11
2
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
LSb
MSb
Units:
LSb
1.5625mV/Rsns
CURRENT OFFSET CORRECTION
Every 1024th conversion, the ADC measures its input offset to facilitate offset correction. Offset correction occurs approximately once per hour. The resulting correction factor is applied to the subsequent 1023 measurements. During the offset correction conversion, the ADC does not measure the sense resistor signal. A maximum error of 1/1024 in the accumulated current register (ACR) is possible; however, to reduce the error, the current measurement made just prior to the offset conversion is displayed in the current register and is substituted for the dropped current measurement in the current accumulation process. This results in an accumulated current error due to offset correction of less than 1/1024. 9 of 25
DS2782: Stand-Alone Fuel Gauge IC
CURRENT MEASUREMENT CALIBRATION
The DS2782's current measurement gain can be adjusted through the RSGAIN register, which is factory-calibrated to meet the data sheet specified accuracy. RSGAIN is user accessible and can be reprogrammed after module or pack manufacture to improve the current measurement accuracy. Adjusting RSGAIN can correct for variation in an external sense resistor's nominal value, and allows the use of low-cost, non-precision current sense resistors. RSGAIN is an 11 bit value stored in 2 bytes of the Parameter EEPROM Memory Block. The RSGAIN value adjusts -10 the gain from 0 to 1.999 in steps of 0.001 (precisely 2 ). The user must program RSGAIN cautiously to ensure accurate current measurement. When shipped from the factory, the gain calibration value is stored in two separate locations in the Parameter EEPROM Block, RSGAIN which is reprogrammable and FRSGAIN which is read only. RSGAIN determines the gain used in the current measurement. The read-only FRSGAIN is provided to preserve the factory value only and is not used in the current measurement.
SENSE RESISTOR TEMPERATURE COMPENSATION
The DS2782 is capable of temperature compensating the current sense resistor to correct for variation in a sense resistor's value over temperature. The DS2782 is factory programmed with the sense resistor temperature coefficient, RSTC, set to zero, which turns off the temperature compensation function. RSTC is user accessible and can be reprogrammed after module or pack manufacture to improve the current accuracy when using a high temperature coefficient current-sense resistor. RSTC is an 8-bit value stored in the Parameter EEPROM Memory Block. The RSTC value sets the temperature coefficient from 0 to +7782ppm/C in steps of 30.5ppm/C. The user must program RSTC cautiously to ensure accurate current measurement. Temperature compensation adjustments are made when the Temperature register crosses 0.5 C boundaries. The temperature compensation is most effective with the resistor placed as close as possible to the VSS terminal to optimize thermal coupling of the resistor to the on-chip temperature sensor. If the current shunt is constructed with a copper PCB trace, run the trace under the DS2782 package if possible.
o
CURRENT ACCUMULATION
Current measurements are internally summed, or accumulated, at the completion of each conversion period with the results displayed in the Accumulated Current Register (ACR). The accuracy of the ACR is dependent on both the current measurement and the conversion timebase. The ACR has a range of 0 to 409.6mVh with an LSb of 6.25mVh. Additional read-only registers (ACRL) hold fractional results of each accumulation to avoid truncation errors. Accumulation of charge current above the maximum register value is reported at the maximum register value (7FFFh); conversely, accumulation of discharge current below the minimum register value is reported at the minimum value (8000h). Charge currents (positive Current register values) less than 100mV are not accumulated in order to mask the effect of accumulating small positive offset errors over long periods. This limits the minimum charge current, for coulombcounting purposes, to 5mA for RSNS = 0.020W and 20mA for RSNS = 0.005W. Read and write access is allowed to the ACR. The ACR must be written MSByte first then LSByte. Whenever the ACR is written, the fractional accumulation result bits are cleared. The write must be completed within 3.515s (one ACR register update period). A write to the ACR forces the ADC to perform an offset correction conversion and update the internal offset correction factor. Current measurement and accumulation begins with the second conversion following a write to the ACR. Writing ACR clears the fractional values in ACRL. The Format of the ACR register is shown in Figure 8, and the format of ACRL is shown in Figure 9. In order to preserve the ACR value in case of power loss, the ACR value is backed up to EEPROM. The ACR value is recovered from EEPROM on power-up. See the Memory Map in Table 2 for specific address location and backup frequency.
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DS2782: Stand-Alone Fuel Gauge IC
Figure 8. Accumulated Current Register Format, ACR
ACR MSB--Address 10h 2
15
R/W & EE LSB--Address 11h 2
9
2
14
2
13
2
12
2
11
2
10
2
8
2
7
2
6
2
5
2
4
2
Units:
3
2
2
2
1
2
0
MSb
LSb
MSb
LSb
6.25mVh/Rsns
Figure 9. Fractional/Low Accumulated Current Register Format, ACRL
ACRL MSB--Address 12h 2
11
Read Only LSB--Address 13h 2
5
2
10
2
9
2
8
2
7
2
6
2
4
2
3
2
2
2
1
2
0
X
X
X
X LSb
MSb
"X": reserved
LSb
MSb
Units:1.526nVHr/RSNS
ACR LSb VSS VSNS 6.25mVh RSNS 20mW 312.5mAh 15mW 416.7mAh 10mW 625mAh 5mW 1.250mAh
ACR RANGE VSS VSNS 409.6mVh RSNS 20mW 20.48Ah 15mW 27.30Ah 10mW 40.96Ah 5mW 81.92Ah
ACCUMULATION BIAS
The Accumulation Bias register (AB) allows an arbitrary bias to be introduced into the current-accumulation process. The AB can be used to account for currents that do not flow through the sense resistor, estimate currents too small to measure, estimate battery self-discharge or correct for static offset of the individual DS2782 device. The AB register allows a user programmed constant positive or negative polarity bias to be included in the current accumulation process. The user-programmed two's compliment value, with bit weighting the same as the current register, is added to the ACR once per current conversion cycle. The AB value is loaded on power-up from EEPROM memory. The format of the AB register is shown in Figure 10.
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DS2782: Stand-Alone Fuel Gauge IC
Figure 10. Accumulation Bias Register Formats
AB Address 61h S MSb
"S": sign bit Units:
EE
2
6
2
5
2
4
2
3
2
2
2
1
2
0
LSb
1.5625mV/Rsns
CAPACITY ESTIMATION ALGORITHM
Remaining capacity estimation uses real-time measured values and stored parameters describing the cell characteristics and application operating limits. The following diagram describes the algorithm inputs and outputs.
Figure 11. Top Level Algorithm Diagram
Voltage Temperature Current (R) (R) (R) Capacity Look-up Available Capacity Calculation ACR Housekeeping Age Estimator Learn Function Cell Parameters 16 bytes (EEPROM) Standby Empty SE(T) (R) FULL Active Empty FULL(T) AE(T) (R) (R)
Accumulated Current (ACR) (R/W) Average Current (R)
Remaining Active Absolute Capacity (RAAC) mAh (R) Remaining Stand-by Absolute Capacity (RSAC) mAh (R) Remaining Active Relative Capacity (RARC) % (R) Remaining Stand-by Relative Capacity (RSRC) % (R)
Aging Cap (AC) (2 bytes EE) Age Scalar (AS) (1 bytes EE) Sense Resistor' (RSNSP) (1byte EE) Charge Voltage (VCHG) (1 byte EE) Min Chg Current (IMIN) (1 byte EE) Active Empty Voltage (VAE) (1 byte EE) Active Empty Current (IAE) (1 byte EE)
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DS2782: Stand-Alone Fuel Gauge IC
MODELING CELL CHARACTERISTICS
In order to achieve reasonable accuracy in estimating remaining capacity, the cell performance characteristics over temperature, load current, and charge termination point must be considered. Since the behavior of Li-ion cells is non-linear, even over a limited temperature range of 10C to 35C, these characteristics must be included in the capacity estimation to achieve a reasonable accuracy. See Applications Note AN131 "Li+ Fuel Gauging with Dallas Semiconductor Devices" for general information on the FuelPackTM method used in the DS2782. To facilitate efficient implementation in hardware, a modified version of the method outlined in AN131 is used to store cell characteristics in the DS2782. Full and empty points are retrieved in a lookup process which re-traces a piece-wise linear model. Three model curves are stored: Full, Active Empty and Standby Empty. Each model curve is constructed with 4 line segments and spans from 0C to 40C. Operation outside the 0C to 40C model span is supported by the model with minimal loss of accuracy. Above 40C, the 40C fixed points are extended with zero slope. This achieves a conservative capacity estimate for temperatures above 40C. Below 0C, the model curves are extended using the slope of each 0C to 10C segment. If low temperature operation is expected, the 0C to 10C slopes can be selected to optimize the model accuracy. A diagram of example battery cell model curves is shown if Figure 12.
Figure 12. Cell Model Example Diagram
100%
Derivative [ppm / C]
FULL
Active Empty
Cell Characterization data points
Standby Empty
1 2 3
4
0C
10C
20C
30C
40C
Full: The Full curve defines how the full point of a given cell depends on temperature for a given charge termination. The charge termination method used in the application is used to determine the table values. The DS2782 reconstructs the Full line from cell characteristic table values to determine the Full capacity of the battery at each temperature. Reconstruction occurs in one-degree temperature increments. Active Empty: The Active Empty curve defines the temperature variation in the empty point of the discharge profile based on a high level load current (one that is sustained during a high power operating mode) and the minimum voltage required for system operation. This load current is programmed as the Active Empty current (IAE), and should be a 3.5s average value to correspond to values read from the Current register, and the specified minimum voltage, or Active Empty voltage (VAE) should be a 220ms average to correspond to values read from the Voltage register. The DS2782 reconstructs the Active Empty line from cell characteristic table values to determine the Active Empty capacity of the battery at each temperature. Reconstruction occurs in one-degree temperature increments. Standby Empty: The Standby Empty curve defines the temperature variation in the empty point in the discharge defined by the application standby current and the minimum voltage required for standby operation. In typical PDA 13 of 25 FuelPack is a trademark of Dallas Semiconductor.
DS2782: Stand-Alone Fuel Gauge IC applications, Standby Empty represents the point that the battery can no longer support RAM refresh and thus the standby voltage is set by the RAM voltage supply requirements. In other applications, Standby Empty can represent the point that the battery can no longer support a subset of the full application operation, such as games or organizer functions on a wireless handset. The standby load current and voltage are used for determining the cell characteristics but are not programmed into the DS2782. The DS2782 reconstructs the Standby Empty line from cell characteristic table values to determine the Standby Empty capacity of the battery at each temperature. Reconstruction occurs in one-degree temperature increments. CELL MODEL CONSTRUCTION The model is constructed with all points normalized to the fully charged state at +40C. Initial values, the +40C Full value in mVh units and the +40C Active Empty value as a fraction of the +40C Full are stored in the cell parameter EEPROM block. Standby Empty at +40C is by definition zero and therefore no storage is required. The slopes (derivatives) of the 4 segments for each model curve are also stored in the cell parameter EEPROM block. Segment endpoints are fixed at 0C, +10C, +20C, +30C and +40C. An example of data stored in this manner is shown in Table 1.
Table 1. Example Cell Characterization Table (Normalized to +40C)
Manufacturers rated cell capacity: 1000mAh Charge Voltage: 4.2V Charge Current: 500mA Termination Current: 50mA Active Empty (V, I): 3.0V, 300mA Standby Empty (V, I): 3.0V, 4mA Sense Resistor: 0.020W +40C 0C +10C +20C +30C +40C Nominal [mAh] Full 1051 0.927 0.951 0.974 0.991 1.0 Active Empty 0.051 0.040 0.022 0.012 0.008 Standby Empty 0.013 0.0067 0.0038 0.001 0
Figure 13. Lookup Function Diagram
Cell Model Parameters 15 bytes (EEPROM) Temperature FULL(T) Lookup Function AE(T) SE(T)
APPLICATION PARAMETERS
In addition to cell model characteristics, several application parameters are needed to detect the full and empty points, as well as calculate results in mAh units. Sense Resistor Prime (RSNSP): RSNSP stores the value of the sense resistor for use in computing the absolute capacity results. The value is stored as a 1-byte conductance value with units of mhos. RSNSP supports resistor values of 1W to 3.922mW. RSNSP is located in the Parameter EEPROM block. Charge Voltage (VCHG): VCHG stores the charge voltage threshold used to detect a fully charged state. The value is stored as a 1-byte voltage with units of 19.52mV and can range from 0V to 4.978V. VCHG should be set marginally less than the cell voltage at the end of the charge cycle to ensure reliable charge termination detection. VCHG is located in the Parameter EEPROM block. 14 of 25
DS2782: Stand-Alone Fuel Gauge IC Minimum Charge Current (IMIN): IMIN stores the charge current threshold used to detect a fully charged state. The value is stored as a 1-byte value with units of 50mV and can range from 0 to 12.75mV. Assuming RSNS = 20mW, IMIN can be programmed from 0mA to 637.5mA in 2.5mA steps. IMIN should be set marginally greater than the charge current at the end of the charge cycle to ensure reliable charge termination detection. IMIN is located in the Parameter EEPROM block. Active Empty Voltage (VAE): VAE stores the voltage threshold used to detect the Active Empty point. The value is stored in 1-byte with units of 19.52mV and can range from 0V to 4.978V. VAE is located in the Parameter EEPROM block. See the Cell Characteristics section for more information. Active Empty Current (IAE): IAE stores the discharge current threshold used to detect the Active Empty point. The unsigned value represents the magnitude of the discharge current and is stored in 1-byte with units of 200mV and can range from 0 to 51.2mV. Assuming RSNS = 20mW, IAE can be programmed from 0mA to 2550mA in 10mA steps. IAE is located in the Parameter EEPROM block. See the Cell Characteristics section for more information. Aging Capacity (AC): AC stores the rated battery capacity used in estimating the decrease in battery capacity that occurs in normal use. The value is stored in 2-bytes in the same units as the ACR (6.25mVh). Setting AC to the manufacturer's rated capacity sets the aging rate to approximately 2.4% per 100 cycles of equivalent full capacity discharges. Partial discharge cycles are added to form equivalent full capacity discharges. The default estimation results in 88% capacity after 500 equivalent cycles. The estimated aging rate can be adjusted by setting AC to a different value than the cell manufacturer's rating. Setting AC to a lower value, accelerates the estimated aging. Setting AC to a higher value, retards the estimated aging. AC is located in the Parameter EEPROM block. Age Scalar (AS): AS adjusts the capacity estimation results downward to compensate for cell aging. AS is a 1-byte -7 value that represents values between 49.2% and 100%. The lsb is weighted at 0.78% (precisely 2 ). A value of 100% (128 decimal or 80h) represents an un-aged battery. A value of 95% is recommended as the starting AS value at the time of pack manufacture to allow learning a larger capacity on batteries that have an initial capacity greater than the nominal capacity programmed in the cell characteristic table. AS is modified by the cycle count based age estimation introduced above and by the capacity Learn function. The host system has read and write access to AS, however caution should exercised when writing AS to ensure that the cumulative aging estimate is not over written with an incorrect value. Usually, writing AS by the host is not necessary because AS is automatically saved to EEPROM on a periodic basis by the DS2782. (See the Memory section for details.) The EEPROM stored value of AS is recalled on power-up.
CAPACITY ESTIMATION UTILITY FUNCTIONS
Aging Estimation As discussed above, the AS register value is adjusted occasionally based on cumulative discharge. As the ACR register decrements during each discharge cycle, an internal counter is incremented until equal to 32 times AC. AS is then decremented by one, resulting in a decrease in the scaled full battery capacity of 0.78%. Refer to the AC register description above for recommendations on customizing the age estimation rate. Learn Function Since Li+ cells exhibit charge efficiencies near unity, the charge delivered to a Li+ cell from a known empty point to a known full point is a dependable measure of the cell capacity. A continuous charge from empty to full results in a "learn cycle". First, the Active Empty point must be detected. The Learn Flag (LEARNF) is set at this point. Then, once charging starts, the charge must continue uninterrupted until the battery is charged to full. Upon detecting full, LEARNF is cleared, the Charge to Full (CHGTF) flag is set and the Age Scalar (AS) is adjusted according to the learned capacity of the cell. ACR Housekeeping The ACR register value is adjusted occasionally to maintain the coulomb count within the model curve boundaries. When the battery is charged to full (CHGTF set), the ACR is set equal to the age scaled full lookup value at the present temperature. If a learn cycle is in progress, correction of the ACR value occurs after the age scalar (AS) is updated.
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DS2782: Stand-Alone Fuel Gauge IC When an empty condition is detected (AEF or LEARNF set), the ACR adjustment is conditional. If AEF is set and LEARNF is not, then the Active Empty Point was not detected and the battery is likely below the Active Empty capacity of the model. The ACR is set to the Active Empty model value only if it is greater than the Active Empty model value. If LEARNF is set, then the battery is at the Active Empty Point and the ACR is set to the Active Empty model value. Full Detect Full detection occurs when the Voltage (VOLT) readings remain continuously above the VCHG threshold for the period between two Average Current (IAVG) readings, where both IAVG readings are below IMIN. The two consecutive IAVG readings must also be positive and non-zero. This ensures that removing the battery from the charger does not result in a false detection of full. Full Detect sets the Charge to Full (CHGTF) bit in the Status register. Active Empty Point Detect Active Empty Point detection occurs when the Voltage register drops below the VAE threshold and the two previous Current readings are above IAE. This captures the event of the battery reaching the Active Empty point. Note that the two previous Current readings must be negative and greater in magnitude than IAE, that is, a larger discharge current than specified by the IAE threshold. Qualifying the Voltage level with the discharge rate ensures that the Active Empty point is not detected at loads much lighter than those used to construct the model. Also, Active Empty must not be detected when a deep discharge at a very light load is followed by a load greater than IAE. Either case would cause a learn cycle on the following charge to full to include part of the Standby capacity in the measurement of the Active capacity. Active Empty detection sets the Learn Flag (LEARNF) bit in the Status register.
RESULT REGISTERS
The DS2782 processes measurement and cell characteristics on a 3.5s interval and yields seven result registers. The result registers are sufficient for direct display to the user in most applications. The host system can produce customized values for system use, or user display by combining measurement, result and User EEPROM values. FULL(T) [ ]: The Full capacity of the battery at the present temperature is reported normalized to the 40C Full value. This 15-bit value reflects the cell model Full value at the given temperature. FULL(T) reports values between -14 100% and 50% with a resolution of 61ppm (precisely 2 ). Though the register format permits values greater than 100%, the register value is clamped to a maximum value of 100%. Active Empty, AE(T) [ ]: The Active Empty capacity of the battery at the present temperature is reported normalized to the 40C Full value. This 13-bit value reflects the cell model Active Empty at the given temperature. -14 AE(T) reports values between 0% and 49.8% with a resolution of 61ppm (precisely 2 ). Standby Empty, SE(T) [ ]: The Standby Empty capacity of the battery at the present temperature is reported normalized to the 40C Full value. This 13-bit value reflects the cell model Standby Empty value at the current -14 temperature. SE(T) reports values between 0% and 49.8% with a resolution of 61ppm (precisely 2 ). Remaining Active Absolute Capacity (RAAC) [mAh]: RAAC reports the capacity available under the current temperature conditions at the Active Empty discharge rate (IAE) to the Active Empty point in absolute units of milliamp-hours. RAAC is 16 bits. Remaining Standby Absolute Capacity (RSAC) [mAh]: RSAC reports the capacity available under the current temperature conditions at the Standby Empty discharge rate (ISE) to the Standby Empty point capacity in absolute units of milli-amp-hours. RSAC is 16 bits. Remaining Active Relative Capacity (RARC) [%]: RARC reports the capacity available under the current temperature conditions at the Active Empty discharge rate (IAE) to the Active Empty point in relative units of percent. RARC is 8 bits. Remaining Standby Relative Capacity (RSRC) [%]: RSRC reports the capacity available under the current temperature conditions at the Standby Empty discharge rate (ISE) to the Standby Empty point capacity in relative units of percent. RSRC is 8 bits. 16 of 25
DS2782: Stand-Alone Fuel Gauge IC Calculation of Results RAAC [mAh] = (ACR[mVh] - AE(T) * FULL40[mVh]) * RSNSP [mhos] RSAC [mAh] = (ACR[mVh] - SE(T) * FULL40[mVh]) * RSNSP [mhos] RARC [%] = 100% * (ACR[mVh] - AE(T) * FULL40[mVh]) / {(AS * FULL(T) - AE(T)) * FULL40[mVh]} RSRC [%] = 100%* (ACR[mVh] - SE(T) * FULL40[mVh]) / {(AS * FULL(T) - SE(T)) * FULL40[mVh]}
STATUS REGISTER
The STATUS register contains bits which report the device status. The bits can be set internally by the DS2782. The CHGTF, AEF, SEF, LEARNF and VER bits are read only bits which can be cleared by hardware. The UVF and PORF bits can only be cleared via the 2-Wire interface.
Figure 14. Status Register Format Address
Field CHGTF
01h
Bit 7 Format Read Only
Bit Definition
Allowable Values Charge Termination Flag Set to 1 when: ( VOLT > VCHG ) AND ( 0 < IAVG < IMIN ) continuously for a period between two IAVG register updates ( 28s to 56s ). Cleared to 0 when: RARC < 90% Active Empty Flag Set to 1 when: VOLT < VAE Cleared to 0 when: RARC > 5% Standby Empty Flag Set to 1 when: RSRC < 10% Cleared to 0 when: RSRC > 15% Learn Flag - When set to 1, a charge cycle can be used to learn battery capacity. Set to 1 when: ( VOLT falls from above VAE to below VAE ) AND ( CURRENT > IAE ) Cleared to 0 when: ( CHGTF = 1 ) OR ( CURRENT < +100V ) OR ( ACR = 0 **) OR ( ACR written or recalled from EEPROM) OR ( SLEEP Entered ) Undefined Under-Voltage Flag Set to 1 when: VOLT < VSLEEP Cleared to 0 by: User Power-On Reset Flag - Useful for reset detection, see text below. Set to 1 upon Power-Up by hardware. Cleared to 0 by: User Undefined
AEF SEF
6 5
Read Only Read Only
LEARNF
4
Read Only
Reserved UVF PORF Reserved
3 2 1 0
Read Only Read / Write * Read / Write * Read Only
* - This bit can be set by the DS2782, and may only be cleared via the 2-Wire interface. ** - LEARNF is only cleared if ACR reaches 0 after VOLT < VAE.
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DS2782: Stand-Alone Fuel Gauge IC
CONTROL REGISTER
All CONTROL register bits are read and write accessible. The CONTROL register is recalled from Parameter EEPROM memory at power-up. Register bit values can be modified in shadow RAM after power-up. Shadow RAM values can be saved as the power up default values by using the Copy Data command.
Figure 15. Control Register Format Address
Field Reserved UVEN
60h
Bit 7 6 Format
Bit Definition
Allowable Values Undefined Under Voltage SLEEP Enable 0: Disables transition to SLEEP mode based on VIN voltage 1: Enables transition to SLEEP mode if, VIN < VSLEEP AND SDA, SCL stable at either logic level for tSLEEP Power Mode Enable 0: Disables transition to SLEEP mode based on SDA, SCL logic state 1: Enables transition to SLEEP mode if SDA, SCL at a logic low for tSLEEP Undefined
Read/Write
PMOD Reserved
5 0:4
Read/Write
SPECIAL FEATURE REGISTER
All Special Feature Register bits are read and write accessible, with default values specified in each bit definition.
Figure 16. Special Feature Register Format Address
Field Reserved SAWE
15h
Bit 2:7 1 Format
Bit Definition
Allowable Values Undefined Slave Address Write Enable 0: Disables writes to the Slave Address Register 1: Enables writes to the Slave Address Register Power-up default: 0 (writes disabled) PIO Sense and Control Read values 0: PIO pin Vil 1: PIO pin Vih Write values 0: Activates PIO pin open-drain output driver, forcing the PIO pin low 1: Disables the output driver, allowing the PIO pin to be pulled high or used as an input Power-up and SLEEP mode default: 1 (PIO pin is hi-Z) Note: PIO pin has weak pulldown
Read/Write
PIOSC
0
Read/Write
EEPROM REGISTER
The EEPROM register provides access control of the EEPROM blocks. EEPROM blocks can be locked to prevent alteration of data within the block. Locking a block disables write access to the block. Once a block is locked, it cannot be unlocked. Read access to EEPROM blocks is unaffected by the lock/unlock status.
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DS2782: Stand-Alone Fuel Gauge IC
Figure 17. EEPROM REGISTER FORMAT Address
Field EEC
1Fh
Bit 7 Format Read Only
Bit Definition
Allowable Values EEPROM Copy Flag Set to 1 when: Copy Data command executed Cleared to 0 when: Copy Data command completes Note: While EEC = 1, writes to EEPROM addresses are ignored Power-up default: 0 EEPROM Lock Enable Host write to 1: Enables the Lock command. Host must issue Lock command as next command after writing Lock Enable bit to 1. Cleared to 0 when: Lock command completes or when Lock command not the command issued immediately following the Write command used to set the Lock Enable bit. Power-up default: 0 Undefined EEPROM Block 1 Lock Flag (Parameter EEPROM 60h - 7Fh) 0: EEPROM is not locked 1: EEPROM block is locked Factory default: 0 EEPROM Block 0 Lock Flag (User EEPROM 20h - 2Fh) 0: EEPROM is not locked 1: EEPROM block is locked Factory default: 0
LOCK
6
Read / Write to 1
Reserved BL1
2:6 1 Read Only
BL0
0
Read Only
PROGRAMMABLE SLAVE ADDRESS
The 2-Wire slave address of the DS2782 is stored in the parameter EEPROM block, address 7Eh. Programming the slave address requires a write to set the SAWE (Slave Address Write Enable) bit in the Special Features register, followed by a write to 7Eh with the desired slave address. The new slave address value is effective following the write to 7Eh, and must be used to address the DS2782 on subsequent bus transactions. The slave address value is not stored to EEPROM until a Copy EEPROM block 1 command is executed. Prior to executing the Copy command, power cycling the DS2782 restores the original slave address value. The data format of the slave address value in address 7Eh is shown in Figure 18. When not writing the slave address, the SAWE bit should be written to a 0.
Figure 18. Slave Address Format
ADDRESS 7E BIT 7 A6 BIT 6 A5 BIT 5 A4 BIT 4 A3 BIT 3 A2 BIT 2 A1 BIT 1 A0 BIT 0 X
A6-A0: Slave Address. A6-A0 contains the 7-bit slave address of the DS2782. The factory default is 0110100b. X: Reserved Bits.
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DS2782: Stand-Alone Fuel Gauge IC
MEMORY
The DS2782 has a 256 byte linear memory space with registers for instrumentation, status, and control, as well as EEPROM memory blocks to store parameters and user information. Byte addresses designated as "Reserved" return undefined data when read. Reserved bytes should not be written. Several byte registers are paired into twobyte registers in order to store 16-bit values. The most significant byte (MSB) of the 16 bit value is located at a even address and the least significant byte (LSB) is located at the next address (odd) byte. When the MSB of a two-byte register is read, the MSB and LSB are latched simultaneously and held for the duration of the read data command to prevent updates to the LSB during the read. This ensures synchronization between the two register bytes. For consistent results, always read the MSB and the LSB of a two-byte register during the same read data command sequence. EEPROM memory consists of the NV EEPROM cells overlaid with volatile shadow RAM. The Read Data and Write Data commands allow the 2-Wire interface to directly accesses only the shadow RAM. The Copy Data and Recall Data function commands transfer data between the shadow RAM and the EEPROM cells. In order to modify the data stored in the EEPROM cells, data must be written to the shadow RAM and then copied to the EEPROM. In order to verify the data stored in the EEPROM cells, the EEPROM data must be recalled to the shadow RAM and then read from the shadow RAM. See Figure 19.
USER EEPROM
A 16 byte User EEPROM memory (block 0, addresses 20h - 2Fh) provides NV memory that is uncommitted to other DS2782 functions. Accessing the User EEPROM block does not affect the operation of the DS2782. User EEPROM is lockable, and once locked, write access is not allowed. The battery pack or host system manufacturer can program lot codes, date codes and other manufacturing, warranty, or diagnostic information and then lock it to safeguard the data. User EEPROM can also store parameters for charging to support different size batteries in a host device as well as auxiliary model data such as time to full charge estimation parameters.
PARAMETER EEPROM
Model data for the cells, as well as application operating parameters are stored in the Parameter EEPROM memory (block 1, addresses 60h - 7Fh). The ACR (MSB and LSB) and AS registers are automatically saved to EEPROM when the RARC result crosses 4% boundaries. This allows the DS2782 to be located outside the protection FETs. In this manner, if a protection device is triggered, the DS2782 cannot lose more that 4% of charge or discharge data.
Figure 19. EEPROM Access via Shadow RAM
Copy EEPROM Serial Interface Write Read Shadow RAM Recall
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DS2782: Stand-Alone Fuel Gauge IC
Table 2. MEMORY MAP
ADDRESS (HEX) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C to 1E 1F 20 to 2F 30 to 37 38 to 5F 60 to 7F 80 to EF F0 to F7 80 to FF FE FF DESCRIPTION Reserved STATUS - Status Register RAAC - Remaining Active Absolute Capacity MSB RAAC - Remaining Active Absolute Capacity LSB RSAC - Remaining Standby Absolute Capacity MSB RSAC - Remaining Standby Absolute Capacity LSB RARC - Remaining Active Relative Capacity RSRC - Remaining Standby Relative Capacity IAVG - Average Current Register MSB IAVG - Average Current Register LSB TEMP - Temperature Register MSB TEMP - Temperature Register LSB VOLT - Voltage Register MSB VOLT - Voltage Register LSB CURRENT - Current Register MSB CURRENT - Current Register LSB ACR - Accumulated Current Register MSB ACR - Accumulated Current Register LSB ACRL - Low Accumulated Current Register MSB ACRL - Low Accumulated Current Register LSB AS - Age Scalar SFR - Special Feature Register FULL - Full Capacity MSB FULL - Full Capacity LSB AE - Active Empty MSB AE - Active Empty LSB SE - Standby Empty MSB SE - Standby Empty LSB Reserved EEPROM - EEPROM Register User EEPROM, Lockable, Block 0 Additional User EEPROM, Lockable, Block 0 Reserved Parameter EEPROM, Lockable, Block 1 Reserved Unique ID Reserved Function Command Register Reserved READ/WRITE R R/W R R R R R R R R R R R R R R R/W* R/W* R R R/W* R/W R R R R R R -- R/W R/W + R/W -- R/W -- + R -- W --
* Register value is automatically saved to EEPROM during ACTIVE mode operation and recalled from EEPROM on power up. + Unique 64 bit ID is a factory option available by special order. Units with IDs do not allow access to additional user EEPROM block 0.
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DS2782: Stand-Alone Fuel Gauge IC
Table 3. PARAMETER EEPROM MEMORY BLOCK 1
ADDRESS (HEX) 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F DESCRIPTION CONTROL - Control Register AB - Accumulation Bias AC - Aging Capacity MSB AC - Aging Capacity LSB VCHG - Charge Voltage IMIN - Minimum Charge Current VAE - Active Empty Voltage IAE - Active Empty Current Active Empty 40 RSNSP - Sense Resistor Prime Full 40 MSB Full 40 LSB Full 3040 Slope Full 2030 Slope Full 1020 Slope Full 0010 Slope ADDRESS (HEX) 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F DESCRIPTION AE 3040 Slope AE 2030 Slope AE 1020 Slope AE 0010 Slope SE 3040 Slope SE 2030 Slope SE 1020 Slope SE 0010 Slope RSGAIN - Sense Resistor Gain MSB RSGAIN - Sense Resistor Gain LSB RSTC - Sense Resistor Temp. Coeff. FRSGAIN - Factory Gain MSB FRSGAIN - Factory Gain LSB Reserved 2-Wire Slave Address Reserved
2-WIRE BUS SYSTEM
The 2-Wire bus system supports operation as a slave only device in a single or multi-slave, and single or multimaster system. Up to 128 slave devices may share the bus by uniquely setting the 7-bit slave address. The 2-wire interface consists of a serial data line (SDA) and serial clock line (SCL). SDA and SCL provide bidirectional communication between the DS2782 slave device and a master device at speeds up to 400 kHz. The DS2782's SDA pin operates bi-directionally, that is, when the DS2782 receives data, SDA operates as an input, and when the DS2782 returns data, SDA operates as an open drain output, with the host system providing a resistive pull-up. The DS2782 always operates as a slave device, receiving and transmitting data under the control of a master device. The master initiates all transactions on the bus and generates the SCL signal as well as the START and STOP bits which begin and end each transaction. Bit Transfer One data bit is transferred during each SCL clock cycle, with the cycle defined by SCL transitioning low-to-high and then high-to-low. The SDA logic level must remain stable during the high period of the SCL clock pulse. Any change in SDA when SCL is high is interpreted as a START or STOP control signal. Bus Idle The bus is defined to be idle, or not busy, when no master device has control. Both SDA and SCL remain high when the bus is idle. The STOP condition is the proper method to return the bus to the idle state. START and STOP Conditions The master initiates transactions with a START condition (S), by forcing a high-to-low transition on SDA while SCL is high. The master terminates a transaction with a STOP condition (P), a low-to-high transition on SDA while SCL is high. A Repeated START condition (Sr) can be used in place of a STOP then START sequence to terminate one transaction and begin another without returning the bus to the idle state. In multi-master systems, a Repeated START allows the master to retain control of the bus. The START and STOP conditions are the only bus activities in which the SDA transitions when SCL is high.
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DS2782: Stand-Alone Fuel Gauge IC Acknowledge Bits Each byte of a data transfer is acknowledged with an Acknowledge bit (A) or a No Acknowledge bit (N). Both the master and the DS2782 slave generate acknowledge bits. To generate an Acknowledge, the receiving device must pull SDA low before the rising edge of the acknowledge-related clock pulse (ninth pulse) and keep it low until SCL returns low. To generate a No Acknowledge (also called NAK), the receiver releases SDA before the rising edge of the acknowledge-related clock pulse and leaves SDA high until SCL returns low. Monitoring the acknowledge bits allows for detection of unsuccessful data transfers. An unsuccessful data transfer can occur if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus master should reattempt communication. Data Order A byte of data consists of 8 bits ordered most significant bit (msb) first. The least significant bit (lsb) of each byte is followed by the Acknowledge bit. DS2782 registers composed of multi-byte values are ordered most significant byte (MSB) first. The MSB of multi-byte registers is stored on even data memory addresses. Slave Address A bus master initiates communication with a slave device by issuing a START condition followed by a Slave Address (SAddr) and the read/write (R/W) bit. When the bus is idle, the DS2782 continuously monitors for a START condition followed by its slave address. When the DS2782 receives a slave address that matches the value in its Programmable Slave Address register, it responds with an Acknowledge bit during the clock period following the R/W bit. The 7-bit Programmable Slave Address register is factory programmed to 0110100. The slave address can be re-programmed, refer to the Programmable Slave Address section for details. Read/Write Bit The R/W bit following the slave address determines the data direction of subsequent bytes in the transfer. R/W = 0 selects a write transaction, with the following bytes being written by the master to the slave. R/W = 1 selects a read transaction, with the following bytes being read from the stave by the master. Bus Timing The DS2782 is compatible with any bus timing up to 400kHz. No special configuration is required to operate at any speed. 2-Wire Command Protocols The command protocols involve several transaction formats. The simplest format consists of the master writing the START bit, slave address, R/W bit, and then monitoring the acknowledge bit for presence of the DS2782. More complex formats such as the Write Data, Read Data and Function command protocols write data, read data and execute device specific operations. All bytes in each command format require the slave or host to return an Acknowledge bit before continuing with the next byte. Each function command definition outlines the required transaction format. The following key applies to the transaction formats.
Table 4. 2-Wire Protocol Key
KEY S SAddr FCmd MAddr Data A N DESCRIPTION START bit Slave Address (7-bit) Function Command byte Memory Address byte Data byte written by master Acknowledge bit - Master No Acknowledge - Master KEY Sr W R P Data A N DESCRIPTION Repeated START R/W bit = 0 R/W bit = 1 STOP bit Data byte returned by slave Acknowledge bit - Slave No Acknowledge - Slave
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DS2782: Stand-Alone Fuel Gauge IC Basic Transaction Formats Write: S SAddr W A MAddr A Data0 A P
A write transaction transfers one or more data bytes to the DS2782. The data transfer begins at the memory address supplied in the MAddr byte. Control of the SDA signal is retained by the master throughout the transaction, except for the Acknowledge cycles. Read: S SAddr W A MAddr A Sr SAddr R A Data0 N P Write Portion Read Portion
A read transaction transfers one or more bytes from the DS2782. Read transactions are composed of two parts, a write portion followed by a read portion, and is therefore inherently longer than a write transaction. The write portion communicates the starting point for the read operation. The read portion follows immediately, beginning with a Repeated START, Slave Address with R/W set to a 1. Control of SDA is assumed by the DS2782 beginning with the Slave Address Acknowledge cycle. Control of the SDA signal is retained by the DS2782 throughout the transaction, except for the Acknowledge cycles. The master indicates the end of a read transaction by responding to the last byte it requires with a No Acknowledge. This signals the DS2782 that control of SDA is to remain with the master following the Acknowledge clock. Write Data Protocol The write data protocol is used to write to register and shadow RAM data to the DS2782 starting at memory address MAddr. Data0 represents the data written to MAddr, Data1 represents the data written to MAddr + 1 and DataN represents the last data byte, written to MAddr + N. The master indicates the end of a write transaction by sending a STOP or Repeated START after receiving the last acknowledge bit. S SAddr W A MAddr A Data0 A Data1 A ... DataN A P The msb of the data to be stored at address MAddr can be written immediately after the MAddr byte is acknowledged. Because the address is automatically incremented after the least significant bit (lsb) of each byte is received by the DS2782, the msb of the data at address MAddr + 1 is can be written immediately after the acknowledgement of the data at address MAddr. If the bus master continues an auto-incremented write transaction beyond address 4Fh, the DS2782 ignores the data. Data is also ignored on writes to read-only addresses and reserved addresses, locked EEPROM blocks as well as a write that auto increments to the Function Command register (address FEh). Incomplete bytes and bytes that are Not Acknowledged by the DS2782 are not written to memory. As noted in the Memory Section, writes to unlocked EEPROM blocks modify the shadow RAM only. Read Data Protocol The Read Data protocol is used to read register and shadow RAM data from the DS2782 starting at memory address specified by MAddr. Data0 represents the data byte in memory location MAddr, Data1 represents the data from MAddr + 1 and DataN represents the last byte read by the master. S SAddr W A MAddr A Sr SAddr R A Data0 A Data1 A ... DataN N P Data is returned beginning with the most significant bit (msb) of the data in MAddr. Because the address is automatically incremented after the least significant bit (lsb) of each byte is returned, the msb of the data at address MAddr + 1 is available to the host immediately after the acknowledgement of the data at address MAddr. If the bus master continues to read beyond address FFh, the DS2782 outputs data values of FFh. Addresses labeled "Reserved" in the memory map return undefined data. The bus master terminates the read transaction at any byte boundary by issuing a No Acknowledge followed by a STOP or Repeated START. Function Command Protocol The Function Command protocol executes a device specific operation by writing one of the function command values (FCmd) to memory address FEh. Table 5 lists the DS2782 FCmd values and describes the actions taken by each. A one byte write protocol is used to transmit the function command, with the MAddr set to FEh and the data 24 of 25
DS2782: Stand-Alone Fuel Gauge IC byte set to the desired FCmd value. Additional data bytes are ignored. Data read from memory address FEh is undefined. S SAddr W A MAddr=0FEh A FCmd A P
Table 5. Function Commands
FUNCTION COMMAND TARGET EEPROM BLOCK 0 Copy Data 1 0 1 0 Lock 1 66h 44h B2h B4h 63h FCMD VALUE DESCRIPTION
This command copies the shadow RAM to the target EEPROM block. Copy Data commands that target locked blocks are ignored. While the Copy Data command is executing, the EEC bit in the EEPROM register is set to 1, and Write Data commands with MAddr set to any address within the target block are ignored. Read Data and Write Data commands with MAddr set outside the target block are processed while the copy is in progress. The Copy Data command execution time, tEEC, is 2ms typical and starts after the FCMD byte is acknowledged. Subsequent Copy or Lock commands must be delayed until the EEPROM programming cycle completes. This command recalls the contents of the targeted EEPROM block to its shadow RAM. This command locks (write-protects) the targeted EEPROM block. The LOCK bit in the EEPROM register must be set to 1 before the lock command is executed. If the LOCK bit is 0, the lock command has no effect. The lock command is permanent; a locked block can never be written again. The Lock command execution time, tEEC, is 2ms typical and starts after the FCMD byte is acknowledged. Subsequent Copy or Lock commands must be delayed until the EEPROM programming cycle completes.
42h
Recall Data
64-BIT UNIQUE ID
The DS2782 can be special ordered with a unique, factory-programmed ID that is 64 bits in length. The first eight bits are the product family code (B2h for DS2782). The next 48 bits are a unique 40-bit serial number followed by 0x82h. The last eight bits are a cyclic redundancy check (CRC) of the first 56 bits (see Figure 16). The 64-bit ID can be read as 8 bytes starting at memory address F0h. The 64-bit ID is read only.
Figure 16. 64-BIT ID FORMAT 8-BIT CRC msb 48-BIT SERIAL NUMBER
8-BIT FAMILY CODE (B2h)
lsb
PACKAGE INFORMATION
(For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.)
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